When Amkor announced plans to build a $1.6 billion chip test and packaging facility near Peoria, Arizona, it was clear that the company planned to serve TSMC’s customers in the state. Apple is ...

TSMC raises CoWoS output goal again, say sources TSMC's backend equipment suppliers benefit from AI chip demand TSMC scaling up equipment and engineering orders for fast plant expansions ...

This test chip was implemented using TSMC's cutting-edge N3P process technology and CoWoS-R advanced packaging technology. The HBM4 IP supports data rates of up to 12 Gbps under all operating ...

The complete PHY and Controller subsystem was developed in collaboration with TSMC and targets applications such as hyperscaler, high-performance computing (HPC) and artificial intelligence (AI).

The chip uses TSMC’s N3P silicon process and CoWoS ® advanced packaging technology. In recent years GUC has developed a family of chiplet interconnect IPs (GLink-2.5D) in TSMC N7, N5 and N3 process ...