The L in L1, L2, and L3 stands for "Level", hinting at their hierarchical structure. The L1 cache is the fastest of the lot, with bandwidth close to 1TB/second and just 1 nanosecond of latency.

Ever been curious how L1 and L2 cache work? We're glad you asked. Here, we deep dive into the structure and nature of one of computing's most fundamental designs and innovations.

Recently, IBM debuted its Telum microprocessor with an interesting and unusual cache structure. Telum has the usual L1 and L2, but instead of a physical L3, the CPU deploys a virtual L3.