TSMC 90 LP, SESAME BIV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of a patented flip flop. Foundry Sponsored, ...

To meet these escalating requirements, the industry is pushing the boundaries of advanced-node silicon and 3D-IC technologies. TSMC and Cadence are at the forefront of this revolution, together ...

The company also announced an even more ambitious technology named System-on-Wafer (SoW) that will allow for 3D stacking of logic and memory directly on top of a 300mm wafer-sized chip.

A new technical paper titled “DeepOHeat: Operator Learning-based Ultra-fast Thermal Simulation in 3D-IC Design” was published (preprint) by researchers at UCSB and Cadence. “Thermal issue is a major ...